LPC1768FBD100

Product Summary

The LPC1768FBD100 is a 32-bit ARM Cortex-M3 microcontroller. The LPC1768FBD100 is ARM Cortex-M3 based microcontroller for embedded application featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC1768FBD100 operates at CPU frequencies of up to 100 MHz. The LPC1768FBD100 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The peripheral complement of the LPC1768FBD100 includes up to 512 kB of flash memory, up to 64 kB of data memory, Ethernet MAC, USB Device/Host/OTG interface, 8-channel general purpose DMA controller, 4 UARTs, 2 CAN channels, 2 SSP controllers, SPI interface, 3 I2C-bus interfaces, 2-input plus 2-output I2S-bus interface, 8-channel 12-bit ADC, 10-bit DAC, motor control PWM, Quadrature Encoder interface, four general purpose timers, 6-output general purpose PWM, ultra-low power Real-Time Clock (RTC) with separate battery supply, and up to 70 general purpose I/O pins.

Parametrics

LPC1768FBD100 dynamic characteristic: (1)tprog programming time: [2] 0.95, 1, 1.05 ms; (2)Nendu endurance: [1] 10000,100000 cycles; (3)tret retention time powered: 10 years; (4)tret retention time unpowered: 20 years; (5)ter erase time sector or multiple consecutive sectors: 95, 100, 105 ms; (6)tprog programming time: [2] 0.95, 1, 1.05 ms.

Features

LPC1768FBD100 features: (1) ARM Cortex-M3 processor, running at frequencies of up to 100 MHZ(LPC1768/67/66/65/64/63)or of up to 120 MHz (LPC1769). A Memory Protection Unit (MPU)supporting eight regions is included; (2) ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC); (3) Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator enables high-speed 120 MHz operation with zero wait states; (4) In-System Programming (ISP)and In-Application Programming (IAP)via on-chip bootloader software; (5) On-chip SRAM includes: 32/16 kB of SRAM on the CPU with local code/data bus for high performance CPU access.

Diagrams